The ESP32S3-Luatos-Core development board is a compact board based on Espressif ESP32-S3. The board comes equipped with a 2.4GHz antenna and supports both Wi-Fi and Bluetooth functionalities.

ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor (Xtensa® 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband, RF module, and numerous peripherals.

ESP32S3-Luatos-Core includes the following features:

Dual core 32-bit Xtensa Microprocessor (Tensilica LX7), running up to 240MHz

Additional vector instructions support for AI acceleration

512KB of SRAM

384KB of ROM

8MB of PSRAM

16MB of FLASH

Wi-Fi 802.11b/g/n

Bluetooth LE 5.0 with long-range support and up to 2Mbps data rate

Digital interfaces:

4x SPI

1x LCD interface (8-bit ~16-bit parallel RGB, I8080 and MOTO6800), supporting conversion between RGB565, YUV422, YUV420 and YUV411

1x DVP 8-bit ~16-bit camera interface

3x UART

2x I2C

2x I2S

1x RMT (TX/RX)

1x pulse counter

LED PWM controller, up to 8 channels

1x USB Port with USB switcher, supporting following modes: - 1x full-speed USB OTG or 1x USB Serial/JTAG controller - USB to serial chip CH343

2x MCPWM

1x SDIO host controller with 2 slots

General DMA controller (GDMA), with 5 transmit channels and 5 receive channels

1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0)

2x Blue LED

Analog interfaces:

2x 12-bit SAR ADCs, up to 20 channels

Timers:

4x 54-bit general-purpose timers

1x 52-bit system timer

3x watchdog timers

Low Power:

Power Management Unit with five power modes

Ultra-Low-Power (ULP) coprocessors: ULP-RISC-V and ULP-FSM

Security:

Secure boot

Flash encryption

4-Kbit OTP, up to 1792 bits for users

Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature)

For more information, check the datasheet at ESP32-S3 Datasheet or the technical reference manual at ESP32-S3 Technical Reference Manual.

Current Zephyr’s ESP32S3-Luatos-Core board supports the following features:

Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command below to retrieve those files.

west blobs fetch hal_espressif

Note

It is recommended running the command above after west update.

The board could be loaded using the single binary image, without 2nd stage bootloader. It is the default option when building the application without additional configuration.

Note

Simple boot does not provide any security features nor OTA updates.

User may choose to use MCUboot bootloader instead. In that case the bootloader must be built (and flashed) at least once.

There are two options to be used when building an application:

Sysbuild

Manual build

Note

User can select the MCUboot bootloader by adding the following line to the board default configuration file.

CONFIG_BOOTLOADER_MCUBOOT=y

The sysbuild makes possible to build and flash all necessary images needed to bootstrap the board with the ESP32 SoC.

To build the sample application using sysbuild use the command:

west build -b esp32s3_luatos_core --sysbuild samples/hello_world

By default, the ESP32 sysbuild creates bootloader (MCUboot) and application images. But it can be configured to create other kind of images.

Build directory structure created by sysbuild is different from traditional Zephyr build. Output is structured by the domain subdirectories:

build/
├── hello_world
│   └── zephyr
│   ├── zephyr.elf
│       └── zephyr.bin
├── mcuboot
│    └── zephyr
│       ├── zephyr.elf
│       └── zephyr.bin
└── domains.yaml

Note

With –sysbuild option the bootloader will be re-build and re-flash every time the pristine build is used.

For more information about the system build please read the Sysbuild (System build) documentation.

During the development cycle, it is intended to build & flash as quickly possible. For that reason, images can be built one at a time using traditional build.

The instructions following are relevant for both manual build and sysbuild. The only difference is the structure of the build directory.

Note

Remember that bootloader (MCUboot) needs to be flash at least once.

Build and flash applications as usual (see Building an Application and Run an Application for more details).

# From the root of the zephyr repository
west build -b esp32s3_luatos_core/esp32s3/procpu samples/hello_world

If CH343 chip is disabled, You need use the following command to build:

# From the root of the zephyr repository
west build -b esp32s3_luatos_core/esp32s3/procpu/usb samples/hello_world

The usual flash target will work with the esp32s3_luatos_core board configuration. Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b esp32s3_luatos_core/esp32s3/procpu samples/hello_world
west flash

Open the serial monitor using the following command:

west espressif monitor

After the board has automatically reset and booted, you should see the following message in the monitor:

***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
Hello World! esp32s3_luatos_core

ESP32-S3 support on OpenOCD is available at OpenOCD ESP32.

ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB cable connected to the D+/D- pins is necessary.

Further documentation can be obtained from the SoC vendor in JTAG debugging for ESP32-S3.

Here is an example for building the Hello World application.

# From the root of the zephyr repository
west build -b esp32s3_luatos_core/esp32s3/procpu samples/hello_world
west flash

You can debug an application in the usual way. Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b esp32s3_luatos_core/esp32s3/procpu samples/hello_world
west debug

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